First Demonstration of Monolithic Three-Dimensional Integration of Ultra-High Density Hybrid IGZO/Si SRAM and IGZO 2T0C DRAM Achieving Record-Low Latency (<10ns), Record-Low Energy (<10fJ) of Data Transfer and Ultra-Long Data Retention (>5000s)

This work firstly demonstrates a monolithic 3D architecture with ultra-high density IGZO/Si SRAM and IGZO 2T0C DRAM (M3D-SD) integrated in 3-tiers. By incorporating ultra-low leakage IGZO transistor in tier 2 as pass gate and BEOL integration on Si-CMOS cross-coupled inverters (Tier 1), a hybrid IGZO/Si SRAM is demonstrated with ultra-high density of 4T footprint and 51% reduced static power. In addition, IGZO 2T0C DRAM is integrated in tier 3, which achieves SRAM-DRAM data transfer with record-low latency (<10ns) and energy (2.26fJ). The M3D-SD (with a minimum VDD of 0.35V) can successfully store the data to IGZO 2T0C DRAM and restore to the hybrid IGZO/Si SRAM after 5000s power off. This work provides a novel M3D platform to boost the memory hierarchy performance.