晶体管
MOSFET
晶体管型号
绝缘体上的硅
反演(地质)
频道(广播)
阈值电压
电子工程
物理
计算机科学
电压
计算物理学
硅
材料科学
电气工程
拓扑(电路)
光电子学
工程类
构造盆地
生物
古生物学
作者
Dayana A. Pino-Monroy,P. Scheer,Mohamed Khalil Bouchoucha,Carlos Galup‐Montoro,Manuel J. Barragán,Philippe Cathelin,Jean‐Michel Fournier,Andreia Cathelin,Sylvain Bourdel
出处
期刊:IEEE Access
[Institute of Electrical and Electronics Engineers]
日期:2022-01-01
卷期号:10: 86270-86285
被引量:20
标识
DOI:10.1109/access.2022.3198644
摘要
This paper presents a 7-parameter analytical model of the MOS transistor based on the inversion charge targeted at the development of simplified analytical circuit design methodologies that take into account the physics of the MOS transistor. The proposed design-oriented model allows for the first time to describe both the main short-channel effects of advanced nanometric technologies and the dependence of the transistor drain current on the drain voltage, while the model remains valid for all bias regimes (from weak to strong inversion) and for all operating regions (linear and saturated). A simple procedure based on the device physics is proposed to estimate the transistor model parameters for a given technology. Furthermore, analytical expressions of the current derivatives are developed targeting different design scenarios. The accuracy of the proposed model is validated by direct comparison to silicon measurements of N-MOS transistors in 28 nm FD-SOI technology for channel width of $1~\mu \text{m}$ and channel lengths of 30 nm, 60 nm and 150 nm, and also to simulations performed with an industry-standard compact model.
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