极紫外光刻
计算机科学
抵抗
材料科学
光电子学
纳米技术
图层(电子)
作者
Mihir Gupta,Sara Paolillo,Bhavishya Chowrira,Joern-Holger Franke,Stefan Decoster,Achintya Kundu,Nadia Vandenbroeck,Hyo Seon Suh,Danilo D. Simone
出处
期刊:
[SPIE]
日期:2025-04-22
卷期号:: 3-3
被引量:5
摘要
EUV photoresist technology is a key enabler for high-resolution patterning to aid in the advancement of Moore’s Law. The patterning improvements in EUV lithography come not only from material optimization of existing photoresist platform, but also from the development of novel photoresist concepts, to push the patterning performance beyond the state-of-the-art. Imec has been actively working on photoresist screening and benchmarking in collaboration with EUV photoresist suppliers using ASML EUV scanners for almost two decades aiming to enable the future device technology nodes towards High Volume Manufacturing (HVM). In this work, we will present a structured and periodic analysis to measure the evolution of EUV photoresists (and processes), and benchmark them against target specifications for performance metrics after exposure and after etching. We will report the results from the evaluation of Chemically Amplified Resists (CARs) and non-CARs for both logic and memory relevant repeated dense structures down to pitch 24nm line/space and pitch 32nm centre-to-centre hexagonal contact holes and pillars. We will discuss the well-known “Resolution - Line edge roughness - Sensitivity (RLS)” trade-off, it’s limitations and how to combine it with the Failure-Free Latitude (FFL) to understand how materials and processes are performing within these known limitations.
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