覆盖
现场可编程门阵列
计算机科学
嵌入式系统
足迹
软件
吞吐量
计算机硬件
计算机体系结构
操作系统
生物
古生物学
无线
作者
Thibaut Gravey,Karim Meddah,Teo Robert,Emmanuel Rutovic,Romain Monthéard,Tarek Ould-Bachir
标识
DOI:10.1109/icit58465.2023.10143138
摘要
This paper presents a generic and software configurable overlay for the acquisition and visualization of data generated by embedded processing systems implemented on FPGA. The proposed architecture takes advantage of the coupling and interaction between the PL (programmable logic) and the PS (processing system) offered by the AMD PYNQ open-source framework on Zynq and several other platforms to provide the end-user with a high level abstraction programming interface. Results, cost, performance and design limitations of the overlay are discussed around its use for HIL simulation of high switching frequency power electronic circuits. The paper demonstrates that the overlay footprint is sufficiently small to be used on low-cost FPGA platforms, and that it provides a throughput of hundreds of millions of samples per second over up to eight 16-bit independent channels, while offering the capacity to log up to 128 MB of contiguous frames of data.
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