Carrier transport mechanism in bottom gate thin‐film transistor with SnO as active layer for CMOS displays

Abstract In this work, we report on four tin monoxide (SnO) thin‐film transistor (TFT) grain boundary (GB) models of carrier transport considering the native defects in the thin film, interface traps, and GB deep/tail states. The changes in the activation energy and the GB barrier potential on the application of gate electric field are thoroughly investigated. The shift in Fermi level and the charge carrier transport mechanisms are examined for the two‐channel model by the application of external potential. Four models are developed to study the impact of phase transformation of SnO material on the TFT characteristics. Among the four developed models which are considered as four different cases, Case (iv) shows excellent performance and the simulation results revealed that the location of Fermi level closer to the mid gap are suggested to favor the ambipolar behavior. Also, the influence of SnO material thickness and the effect of different dielectrics on the ambipolar device characteristics are examined aiming at optimized performance of the device. The developed optimized model will help the process engineers in tuning the SnO material parameters for achieving better performance in both p‐type and n‐type TFTs when employed in CMOS based displays.