鳍
材料科学
金属浇口
金属
光电子学
控制(管理)
纳米技术
计算机科学
电气工程
栅氧化层
复合材料
晶体管
工程类
人工智能
冶金
电压
作者
Jyi-Tsong Lin,Yung Hsin Lin
出处
期刊:Physica Scripta
[IOP Publishing]
日期:2024-12-10
卷期号:100 (1): 015530-015530
标识
DOI:10.1088/1402-4896/ad9d05
摘要
Abstract In this paper, we propose a new structure for Fin-iTFET where the main gate and source metal are formed simultaneously, and the control gate and drain are formed simultaneously. The process used for the fabrication is simple, cost-effective, and fully compact with conventional CMOS technology. With the help of a control gate, our Fin-iTFET can achieve a steep subthreshold swing ( SS avg) and a high I ON / I OFF ratio. Using Sentaurus TCAD simulations, we confirm that the current transport mechanism of our Fin-iTFET is based on band-to-band line-tunneling, which enhances the ON current ( I ON ) and mitigates leakage with a reduced trap-assisted tunneling (TAT) effect. Instead of relying on dopant implantations and thermal annealing, we utilize a metal-semiconductor Schottky junction to enhance the minority carrier concentration at the source end, increase band bending, increase the overlap between the conduction band and valence band, increase the vertical electric field, and thereby increase the line tunneling generation rates, ultimately enhancing the ON current of the device. The simulations show that the device exhibits an SSavg of 13.6 mV dec −1 with an I ON / I OFF ratio of 10 9 at V D = −0.2 V and V CG = 0.2 V. In summary, our Fin-iTFET can achieve excellent electrical performance at low power supply voltages.
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