Techniques of gyrator realization

This thesis examines the techniques by which the gyrator may be realized with transistors, resistors and capacitors. The gyrator has a particularly important application as a means by which inductance may be simulated in integrated circuits. Therefore, considerable emphasis is given to this particular application. Existing realization techniques are examined and the limitations of each method are discussed and compared. Then, a procedure is developed by which new, ideal gyrator networks may be derived. Several possible transistorized realizations are suggested and, in the third and fourth chapters, the analysis and design of practical circuits are considered. The basic practical problem, which is common to all gyrator realizations, is that of circuit instability. It is shown that stable realizations of the proposed ideal networks depend on the non-ideal performance of the transistors. The analysis of the proposed circuits is performed with a digital computer. In this way, it is possible to identify the transistor parameters that cause significant non-ideal performance. Then, simple equivalent circuits are suggested that enable stability criteria to be derived. Practical gyrator circuits are designed and comparisons are made between the measured, designed, computed and ideal performances. These circuits are used to simulate inductance and it is shown that they may be used in 'inductorless' resonant circuits. The potential applications of these circuits, in integrated circuit form, partially explain the importance of this topic.