材料科学
聚合物
电介质
共价键
制作
纳米技术
电容器
表面能
纳米尺度
光电子学
肖特基势垒
化学工程
储能
热传导
聚醚酰亚胺
溶解
超级电容器
电容
电容感应
粘附
介电损耗
复合材料
表面电荷
肖特基二极管
纳米结构
表面工程
带隙
导电聚合物
电化学
表面改性
作者
Xin Li,Pengfei Li,Weibin Ren,Yunyu Liu,Ye Xiao,Erxiang Xu,Shiyi Wu,S. Zhao,Jiayu Pan,Jianyong Jiang,Minzheng Yang,Hui Tong,Penghao Hu,Zongbo Zhang,Ce‐Wen Nan,Yang Shen
标识
DOI:10.1002/aenm.202505932
摘要
ABSTRACT Polymer dielectrics are crucial for high‐energy‐density electrostatic capacitors yet suffer from severe high‐temperature performance degradation due to escalated conduction loss and diminished breakdown strength. While conventional construction of nanoscale inorganic surface layers on dielectric polymer films can partially suppress conduction losses at elevated temperatures, poor interfacial adhesion coupled with complex, expensive fabrication technology hinders industrial scalability. Herein, we develop a solution‐processed nanoscale inorganic covalent surface barrier (SNICS) strategy. Specifically, scalable ultrathin SiO x barrier layers featuring covalently bonded Si─C transition interphases are conformally fabricated on both surfaces of polyetherimide (PEI) films via facile ultrasonic spray‐coating (USC) of perhydropolysilazane (PHPS) precursor solution followed by room‐temperature ultraviolet (UV) irradiation. The SNICS architecture ensures robust interfacial cohesion while effectively suppressing conduction loss through: 1) substantial elevation of the Schottky emission barrier height; 2) introduction of deep charge traps by the high‐electron‐affinity Si─C interphase; and 3) enhanced thermal/mechanical stability from the covalent bonding, outperforming traditional magnetron‐sputtered counterparts. Consequently, SNICS‐engineered films with optimized 186 nm SNICS achieve an exceptional discharged energy density ( U d ) of 5.05 J cm −3 with 90 % efficiency at 200 °C, which is significantly higher than the reported values obtained in the composites fabricated with multilayered structures, with along siding excellent self‐healing capability and outstanding cyclability. This surface engineering presents a scalable pathway for high‐temperature high‐performance polymer capacitors.
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