DC to RF Small-Signal Compact DG MOSFET model

We present an analytical and continuous model for a doped double gate SOI MOSFET in which the channel current as well as the small-signal parameters are written as explicit functions of the applied voltages. The model is valid from below to well above threshold, showing a smooth transition between the regimes. The calculated current and capacitance characteristics show a good agreement with 2D numerical device simulations, in all regimes. Using the active transmission line approach the model has been extended to the RF regime. The high-frequency and noise performances of the DG MOSFETs have been analysed. presented a current model valid for low V DS . Our model works in all operating regimes from weak to strong inversion and from the linear regime to saturation. The current expression is based on a unified charge control model, written in terms of charge densities at the source and drain ends (12) and derived for a doped DG MOSFET. We use an accurate explicit expression of the inversion charge densities in terms of the applied bias. The model is continuous through all operation regimes (linear, saturation, sub threshold). No fitting parameters are used in the charge control model. The model is valid up to well above threshold. Actually these devices are not operated at high values of V GS, and therefore the model is valid for the regimes of practical interest. This model includes expressions of current, charge and capacitances, thus resulting also in a complete small-signal model. The explicit model of the channel current shows a good agreement with the 2D numerical device simulations. A good agreement is observed also for all the capacitances expressions compared to the 2D device numerical simulations. Therefore, our complete small signal model is suitable for use in circuit simulators. We have extended our DG MOSFET model to RF is done through channel segmentation. The obtained local quasi-static compact models of transconductance, conductance and capacitances are used in ea ch segment. Furthermore, we have developed a physical DG MOSFET noise modelling which includes diffusion and tunnel gate current contributions; this model has been included in our small-signal macro -model. We have considered the extrinsic elements, series source and drain resistances and overlap and fringing capacitances. The high-frequency performances of the DG MOSFETs are analysed through the use of analytical expressions of the cut-off frequency fT and maximum frequency of oscillation fmax. The noise properties of the devices have been discussed. Our simulation results show the importance of gate tunnelling current and parasitic resistance as noise figure limiting factors when the gate length is downscaled.