微分非线性
积分非线性
最低有效位
相关双抽样
采样(信号处理)
CMOS芯片
固定模式噪声
噪音(视频)
模数转换器
图像传感器
放大器
计算机科学
电子工程
逐次逼近ADC
电容器
转换器
电气工程
工程类
图像(数学)
人工智能
电压
计算机视觉
滤波器(信号处理)
操作系统
作者
Jong-Boo Kim,Seong‐Kwan Hong,Oh‐Kyong Kwon
出处
期刊:IEEE Transactions on Circuits and Systems Ii-express Briefs
[Institute of Electrical and Electronics Engineers]
日期:2015-05-01
卷期号:62 (5): 451-455
被引量:29
标识
DOI:10.1109/tcsii.2014.2387531
摘要
This brief presents a low-power CMOS image sensor with 14-bit column-parallel two-step (TS) successive approximation (SA) analog-to-digital converters (ADCs). The proposed TS SA ADC adopts a pseudomultiple sampling method to reduce the power consumption and the area. For implementing the 14-bit ADC, it only uses a capacitor digital-to-analog converter of 6 bits rather than 14 bits. The multiple sampling also suppresses the noise of a pixel and a column-parallel ADC. The image sensor is fabricated by using the 0.13-μm CMOS process. The measurement results show that the temporal noise is 82.7 μVrms, and the power consumption is 55.1 μW for one column ADC with a programmable gain amplifier. With the digital correlated double sampling and the TS calibration method, the proposed ADC achieves the column fixed-pattern noise of 0.98 LSB and a differential nonlinearity of +0.99/-0.90 LSB.
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