Taguchi DoE for Solder Voids Reduction

Voids in solder joints are considered one of main defects in Printed Circuit Board Assemblies (PCBAs). The reason for the formation of solder voids is mainly caused by the organic volatile matter in the flux of solder paste that cannot effused timely during the reflow process. During the reflow process, the flux has been consumed and decomposed; resulting in the amount of outgassing flux gets entrapped in the solder. In this study, we used Taguchi Methods to estimate factors which like PCB materials and surface finished, pad design, reflow profile, stencil aperture and solder paste, then come out the optimized parameters to reduce the solder voids for Light Emitting Diode (LED). In addition to the optimization of process parameters, introduced vacuum reflow technology to ensure that process of reflow can be achieved low voids, thereby enhancing the welding strength, reducing the resistance of the soldering layer and increasing the heat transfer to facilitate the heat dissipation for LEDs.