Residue-free wafer-scale direct imprinting of two-dimensional materials

Two-dimensional (2D) semiconductors hold great potential for next-generation electronics in extending Moore’s law beyond silicon. However, despite pioneering advances in proof-of-concept device demonstration and wafer-scale crystal synthesis, its industrialization will be hampered by the lack of a compatible residue-free patterning technology. To overcome this limitation, we demonstrate a facile metal-stamp imprinting method for patterning 2D film into wafer-scale arrays of intrinsic quality. The three-dimensional (3D) morphology of metal-stamp forms a local contact at stamp-2D interface, ensuring that the 2D material could be selectively exfoliated and leaving 2D arrays on grown substrate. Furthermore, detailed microscopy and spectroscopy characterizations are conducted to confirm their clean surface and undamaged crystal structure. A statistical analysis of the 100 back-gated transistors and 500 top-gated logic circuits shows a marked improvement in device uniformity (20 times lower variation of threshold voltage) than traditional method, and a high device yield of 97.6% on 2-inch wafer. This work achieves a residue-free, time-saving, and widely applicable patterning technique for 2D materials and lays the foundation for the future integration of 2D electronics in industry.