低压差调节器
调节器
晶体管
回转率
跌落电压
CMOS芯片
电压调节器
电气工程
瞬态响应
瞬态(计算机编程)
功率半导体器件
线性调节器
工程类
电压
物理
材料科学
控制理论(社会学)
计算机科学
化学
操作系统
基因
生物化学
人工智能
控制(管理)
作者
Sau Siong Chong,P.K. Chan
标识
DOI:10.1109/tvlsi.2013.2290702
摘要
An output-capacitorless low-dropout (OCL-LDO) regulator with a push-pull composite power transistor is presented in this paper. Using the proposed composite transistor, the nondominant parasitic poles can be pushed to higher frequencies, leading to good stability. In addition, the slew rate limitation at the gate of the power transistor is improved greatly by the proposed push-pull structure. Implemented and fabricated in UMC 65-nm CMOS technology, the LDO regulator occupies only an active area of 0.0096 mm 2 . The experimental results have shown that the regulator is able to operate at VIN = 0.75 V and deliver a maximum load current of 50 mA with a dropout voltage of less than 250 mV. It consumes a quiescent current of 16.2 μA and is able to settle within 1.2 μs.
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