XNOR门
逻辑门
CMOS芯片
计算机科学
通流晶体管逻辑
稳健性(进化)
功率延迟产品
绝热电路
晶体管
电子工程
电气工程
电压
工程类
加法器
与非门
基因
化学
生物化学
作者
Jyoti Kandpal,Abhishek Tomar,Shivam Adhikari,Vijay Joshi
标识
DOI:10.1109/iespc.2019.8902392
摘要
In this paper, a high speed and low power XOR-XNOR circuit in hybrid logic style in 90 nm CMOS technology is presented. The proposed XOR-XNOR circuit is symmetrical and has only single pass transistor in all delay paths. The designed circuit provides simultaneous generation of XOR-XNOR logic, balanced output and exhibits full voltage swing in all internal and external nodes. Due to full swing in delay path, the circuit has high portability, high noise robustness, and good driving capabilities. The simulation results show 8%, 5%, and 13.2% improvement in delay, power consumption and Power Delay Product (PDP), respectively. The circuit has used only 10 transistors.
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