平版印刷术
德拉姆
抵抗
进程窗口
计算机科学
计算光刻
与非门
光学(聚焦)
炸薯条
极紫外光刻
电子工程
逻辑门
多重图案
材料科学
纳米技术
工程类
计算机硬件
光电子学
光学
电信
物理
图层(电子)
作者
Kouichi Fujii,T. Kumazaki,Masakazu Hattori,Yosuke Fujimaki,Toshihiro Oga,Kouji Kakizaki,Junichi Fujimoto,Hakaru Mizoguchi
摘要
In modern semiconductor lithography world, doubtlessly, scanners using DUV as light source still be main work horses to push physical limits of semiconductor devices to a new level. Meanwhile, as the semiconductor devices diversified to many different types, for example, logic, DRAM, NAND ash, CMOS Image Sensor (CIS), etc., lithography performances needed are also diversified. For example, CH/VIA layers in the-state-of-the-art logic processes require improved lithography Process Window (PW) due to their shallow Depth of Focus (DOF). On the other hand, engineers working in the field of modern 3D-NAND ash memory and CIS lithography are needed to deal with problems induced by thick resists. Efforts by chip makers, scanner vendors solved the problems in some degree. For example, focus drilling multi-exposure, has improved DOF of some specific layers substantially. But all these approaches have some kinds of issues, such as, throughput losses, etc. As a light source maker, we believe we can make unique contributions to solve the issues. In this report, we are going to show that our advanced Spectral Engineering (SE), a cost-effective way, can provide chip makers with an alternative to cope with the challenges stated above.
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