LOTS: Low Overhead TSV Repair Method Using IEEE-1838 Standard Architecture

For 3-D Stacked integrated circuit (IC) technology, through-silicon via (TSV), which is used for interconnection between dies, is a very important part but has a high fault occurrence rate. In the post-bond stage after packaging, it is impossible to remove and repair the faulty TSV, so it is repaired by inserting the redundancy TSV (RTSV) and diverting the signal. However, both the RTSV and the routing cause the burden of hardware overhead. In this paper, a new TSV repair method with low hardware overhead using IEEE-1838 standard architecture (LOTS) is proposed. Using the 183S-standard architecture, inserted for the test of 3-D IC, for signal shifting and TSV repair, it has very lower hardware overhead than conventional methods.