Study on the interface mechanism of copper migration failure in solder mask-substrate package

Microelectronic packaging technology is developing towards a complex structure with finer routing layers, which will bring great challenges to the reliability of microelectronic packaging. The failure caused by the migration of trace on devices in high temperature and humidity environment is especially serious. Today, there is still a lack of detailed research on the effect of interface mechanism of stacked material on copper migration. In this paper, for more investigation of interface mechanism, two types of solder mask (SM) material with different characteristics, AUS 320 and AUS SR1, were used for comparative experiments. The interface mechanism of stacked material during copper migration was studied based on commercial Flip Chip-Chip Scale Package (FC-CSP) by Biased Highly Accelerated temperature and humidity Stress Test (B-HAST). The characteristics of interface bonding of the two types of solder mask-substrate bi-material samples were discussed in detail by analyzing the failure mode and characterizing migration sites. The study shows that material interface affects physical mechanism of failure, which shows different failure modes of migration of copper trace along the interface micro-cracks under bias. The research results can provide theoretical basis and experimental support for the study of reliability of packaging device.