| 标题 |
An Area-Efficient, Conflict-Free, and Configurable Architecture for Accelerating NTT/INTT |
| 网址 | |
| DOI | |
| 其它 |
期刊:IEEE Transactions on Very Large Scale Integration (VLSI) Systems 作者:Si-Huang Liu; Chia-Yi Kuo; Yan-Nan Mo; Tao Su 出版日期:2024 |
| 求助人 | |
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(2025-6-4)