整流器(神经网络)
电气工程
CMOS芯片
电效率
能量转换效率
电压
电子工程
功率(物理)
工程类
计算机科学
拓扑(电路)
物理
量子力学
随机神经网络
人工神经网络
机器学习
循环神经网络
作者
Syed Adil Ali Shah,Danial Khan,Qurat Ul Ain,Muhammad Basim,Khuram Shehzad,Deeksha Verma,Pervesh Kumar,Joon-Mo Yoo,Young Gun Pu,Yeonjae Jung,Hyungki Huh,Seokkee Kim,Keum Cheol Hwang,Youngoo Yang,Kang‐Yoon Lee
标识
DOI:10.1109/tpel.2022.3204548
摘要
This article presents a power management integrated circuit for a wireless power receiver unit. A dual-mode high-efficiency active rectifier design is based on alliance for wireless power (A4WP) and wireless power consortium (WPC) standards. A gate charge recycling technique is proposed in the dual-mode active rectifier so that the current generated by the switching of the high side gate driver can be recycled to the rectifier output voltage in order to enhance efficiency. A step-down dc–dc converter with a proposed bootstrap circuit and dynamic pull-up resistor gate driver circuit is designed. The chip is implemented in a 0.18-μm bipolar-CMOS double-diffused metal-oxide-semiconductor process. The total die area, including the pad, is 2.64 mm × 2.6 mm. The measurement results show that the active rectifier achieves peak power conversion efficiency (PCE) of 94.7% and generates an output voltage of 7.68 V in WPC mode and 9.1 V with 93.4% efficiency in A4WPC mode. The input voltage varies from 10 V P-P –12 V P-P . Similarly, the step-down dc–dc converter obtains a peak PCE of 93.2% at a load current of 500 mA while producing an output voltage of 5 V. The overall system efficiency at A4WP and WPC mode are 86.7% and 88.2%, respectively.
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