CMOS Active-Pixel Sensor With In-Situ Memory for Ultrahigh-Speed Imaging

State-of-the-art image sensor arrays have not been able to operate at frame rates that exceed tens to hundreds of thousands of frames per second. The main bottle neck preventing imaging at higher frame rates is the time required to access the array, convert the image data from analog to digital, and transmit the data off the image sensor chip. The later is considered the most significant source of delay, mainly due to the limited number of input and output ports available on the chip. This work allows for a significant increase in image capture rate by separating the image acquisition phase from the conversion and readout phase. This was done by capturing eight frames at a high capture rate and temporarily storing the multiple frames into analog memory units that are incorporated inside the pixel. The design was implemented in a deep-submicron CMOS 130 nm technology that allows for high-speed operation. This paper discusses the tradeoffs of using in-situ frame storage and gives some recommendations.