A 0.73-to-1.71 V Capacitor-less Low-Noise Low-Dropout Regulator in 28-nm CMOS

This paper presents a low-noise low-dropout regulator (LNLDO) implemented in a 28 nm technology. The LNLDO features a two-stage architecture, using a low-pass filter with a very low cut-off frequency to separate the regulation loop and the noisy devices such as resistive divider and bandgap reference. Supplied by a 1.5 V-1.8 V input voltage, the LNLDO is able to provide a stable output voltage ranging from 0.73 V to 1.71 V, with a current supply ability from 0 to 35 mA. An on-chip capacitance enhancer is used to stabilize the regulation loop without an additional external capacitor. The RMS noise from 10 Hz to 100 kHz of the LNLDO is below 20μV.