Research of High-speed Lossless Compression FPGA Implementation Method

The lossless compression FPGA implementation method is studied in this paper,which is based on the improved LZW algorithm.The improved LZW algorithm,unlike the traditional one dependent on a fixed-word-width dictionary,adopts a hierarchical dictionary system composed of several varied-word-width independent dictionaries.So it can take full advantage of FPGA's parallel processing capabilities so as to realize the high-speed lossless compression.With this method,a data lossless compression system in the FPGA is successfully designed,and the test results show that,when the system clock is 50 MHz,the compression speed comes up to a range from 66.67～246.15 Mbit/s.