材料科学
电容
晶体管
等离子体
蚀刻(微加工)
电压
光电子学
等离子体刻蚀
等离子体处理
氧化物
图层(电子)
分析化学(期刊)
纳米技术
化学
电气工程
物理
冶金
工程类
物理化学
量子力学
色谱法
电极
作者
Yukimasa Okada,Kouichi Ono,Koji Eriguchi
标识
DOI:10.7567/jjap.56.06hd04
摘要
Aggressive shrinkage and geometrical transition to three-dimensional structures in metal–oxide–semiconductor field-effect transistors (MOSFETs) lead to potentially serious problems regarding plasma processing such as plasma-induced physical damage (PPD). For the precise control of material processing and future device designs, it is extremely important to clarify the depth and energy profiles of PPD. Conventional methods to estimate the PPD profile (e.g., wet etching) are time-consuming. In this study, we propose an advanced method using a simple capacitance–voltage (C–V) measurement. The method first assumes the depth and energy profiles of defects in Si substrates, and then optimizes the C–V curves. We applied this methodology to evaluate the defect generation in (100), (111), and (110) Si substrates. No orientation dependence was found regarding the surface-oxide layers, whereas a large number of defects was assigned in the case of (110). The damaged layer thickness and areal density were estimated. This method provides the highly sensitive PPD prediction indispensable for designing future low-damage plasma processes.
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