Design and implementaton of SRAM macro unit

作者
Surya Narayan Panda,Somanath Padhi,Vedula Phanindra,Umakanta Nanda,Sushant Kumar Pattnaik,Debasish Nayak
出处
期刊:2017 International Conference on Trends in Electronics and Informatics (ICEI) 卷期号:: 119-123 被引量:8
标识
DOI:10.1109/icoei.2017.8300898
摘要

The topic SRAM Macro basically explains the memory unit associated with any processor. Here Macro signifies that the explanation will not only contain the memory unit but also contain all the peripherals like control block, I/O block, row & column decoders etc. SRAM signifies that the fundamental memory unit is the SRAM cell. SRAM is nothing but static random access memory that means statically we can access the memory content of the cell. SRAM has some advantages over DRAM that's why SRAM is frequently chosen and the main advantage is SRAM does not require regular periodic refreshment, means once something is stored in a SRAM cell then that will last till power is on. But in case of DRAM regular refreshment is required. Therefore SRAM is widely used. Again SRAM is classified into several categories like 4T SRAM, 6T SRAM, 8T SRAM etc. depending upon the no. of MOSFETs it contains i.e. in 4T SRAM 4 MOSFETs are used, in 6T SRAM 6 MOSFETs are used, in 8T SRAM 8 MOSFETs are used & like wise. Among these, 6T SRAM is widely used because of its advantages over others. In 4T SRAM as no. of MOSFETs are less so it consumes less chip area but here voltage swing is very high so 4T SRAM is discarded from stability point of view. Now if we'll consider the 8T SRAM then it's highly stable but due to more no. of MOSFETs it consumes more chip area so 8T SRAM is discarded from area consumption point of view. Therefore finally 6T SRAM is chosen because it gives stability as well as it consumes moderate chip area.

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