计算机科学
内存占用
残余物
现场可编程门阵列
二进制数
人工神经网络
吞吐量
架空(工程)
卷积神经网络
计算机工程
矩阵乘法
足迹
人工智能
软件
算法
嵌入式系统
算术
量子
生物
操作系统
电信
物理
古生物学
量子力学
数学
程序设计语言
无线
作者
Mohammad Ghasemzadeh,Mohammad Samragh,Farinaz Koushanfar
标识
DOI:10.1109/fccm.2018.00018
摘要
This paper proposes ReBNet, an end-to-end framework for training reconfigurable binary neural networks on software and developing efficient accelerators for execution on FPGA. Binary neural networks offer an intriguing opportunity for deploying large-scale deep learning models on resource-constrained devices. Binarization reduces the memory footprint and replaces the power-hungry matrix-multiplication with light-weight XnorPopcount operations. However, binary networks suffer from a degraded accuracy compared to their fixed-point counterparts. We show that the state-of-the-art methods for optimizing binary networks accuracy, significantly increase the implementation cost and complexity. To compensate for the degraded accuracy while adhering to the simplicity of binary networks, we devise the first reconfigurable scheme that can adjust the classification accuracy based on the application. Our proposition improves the classification accuracy by representing features with multiple levels of residual binarization. Unlike previous methods, our approach does not exacerbate the area cost of the hardware accelerator. Instead, it provides a tradeoff between throughput and accuracy while the area overhead of multi-level binarization is negligible.
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