神经形态工程学
计算机科学
可扩展性
计算机体系结构
非线性系统
接口
现场可编程门阵列
可重组计算
软件
乙状窦函数
嵌入式系统
计算机硬件
整改
限制
人工智能
程序设计范式
逻辑门
炸薯条
可重构性
电子工程
油藏计算
芯片上的系统
非易失性存储器
作者
Zhi-Cheng Zhang,Yuan Li,Jian Yao,Zhaolong Chen,Fudong Wang,Shuhan Si,Yue Ding,Hui-Ling Qi,Tong-Bu Lu,Lixing Kang,Zhi-Bo Liu,Jianguo Tian,Xu-Dong Chen
标识
DOI:10.1038/s41467-026-68402-7
摘要
Abstract The rapid growth of artificial intelligence and the Internet of Things calls for compact hardware platforms that integrate sensing, computing, and nonlinear processing within a unified architecture. However, most existing neuromorphic systems implement only partial functionalities and rely on heterogeneous device integration, limiting scalability and efficiency. Here, we show a high-speed, reconfigurable multi-modal split-floating-gate memory that monolithically integrates in-sensor computing, in-memory computing, and multiple nonlinear activation functions within a single device structure. By programming charges in spatially separated floating gates, the device enables non-volatile analog control of photoresponsivity and conductance, as well as electrically reconfigurable rectification to emulate ReLU and Sigmoid activations. We further demonstrate a fully hardware-implemented sensor–processor system based on the multi-modal split-floating-gate memory arrays that performs complete unsupervised and supervised learning tasks. This work establishes a compact, energy-efficient, and reconfigurable hardware foundation for scalable intelligent systems beyond conventional silicon architectures.
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