High-Speed Sampling of Column Bus Signal of Large Array CMOS Image Sensor

In order to improve the sampling speed of column bus in large array CMOS image sensor (CIS), the paper presents a high-speed sampling circuit. Based on 55nm CIS special process, the charging and discharging current of parasitic capacitor is increased by current self-adaptive method, the speed of charging and discharging are improved greatly. According to the column bus parasitic parameters of 10000×10000 pixels CMOS image sensor with 10$\mu$m pixel, a signal self-acceleration method is designed. The experimental results show that the charging time is shortened from 4$\mu$s to 790ns, and the discharging time is shortened from 22.43$\mu$s to 1.17$\mu$s under 38pF parasitic capacitance in the column bus.