Optimum Resource Utilization for the Implementation of FPGA-based Fast Convolutional Algorithms for CNN Modelling

Convolutional neural network (CNN) models are an aspect of deep learning algorithms used extensively in computer vision tasks. CNN models depend largely on convolutional algorithms. Employing optimized convolutional algorithms on Field Programmable Gate Array (FPGA) can significantly boost the performance and efficiency of CNN models. This paper presents the optimal resource utilization and power consumption of convolutional algorithm techniques for implementing CNN models on FPGA platforms. The proposed method concentrates on minimizing the FPGA-based CNN model's usage of resources and power consumption while maintaining its accuracy. To achieve this, the proposed methodology employs the concept of on-chip memory access and evaluates the performance of various convolutional algorithm techniques, including General Element-wise Matrix Multiplication (GEMM) and Winograd-based convolution, on the convolutional layer of the CNN model. During execution, the performance of each technique is measured based on the number of resources and energy consumed. To validate the effectiveness of the proposed methodology, the CNN convolutional layer is implemented and assessed on a Xilinx Artix-7 FPGA. The results reveal a substantial decrease in resource utilization and energy consumption.