Incorporating Time-Domain Reflectometry in Chip-Level Failure Analysis Workflow: Case Studies

Abstract Non-destructive electrical fault isolation (FI) techniques such as emission- and laser-based techniques have been utilized widely for chip-level failure analysis (FA). However, these techniques by themselves can sometimes be inadequate for certain failure modes. In this paper, we present six FA case studies using Time-Domain Reflectometry (Electro-optical terahertz pulse reflectometry) in combination with the traditional FI techniques.