Overcome the IBIS Model Overclocking Issue for SDRAM Interface

Overclocking means next transition of a signal is triggered when this transition is not finished. Compared to high-speed serial signals, overclocking issue rarely happened for parallel signals of SDRAM before. But as the speed of LPDDR4x is reaching 4.266Gbps and LPDDR5 is reaching 6.4Gbps, this issue is becoming more and more obvious and serious. This paper will present the symptoms of overclocking issue encountered during the SDRAM simulation with IBIS model, and will also give a SDRAM IBIS model generation flow to provide a robust IBIS model without the overclocking issue.