Investigation on Thermal-Mechanical Reliability and Enhanced Fatigue Life of Indium Thermal Interface Materials for Large-Size Flip Chip Packaging

As the demand for thermal management of large-size chips grows, indium is considered an ideal thermal interface material (TIM) due to its inherent high thermal conductivity and good ductility. For large-size flip chip packaging, how to enhance reliability, especially under temperature cycling, remains a challenge. With large-size flip chip packaging as its research object this study employed a method that combines finite element simulation and experiments to systematically analyze the creep behavior and morphological evolution of indium under temperature cycling. Based on this analysis, the fatigue life of indium was predicted using the strain-based Coffin-Manson model. To enhance the reliability of the indium layer under temperature cycling, a Design of Experiments (DOE) simulation scheme was used to analyze the influence of varying structural parameters on fatigue life. The results demonstrate that the accumulated plastic strain at the position close to the edge of the chip is the largest, aligning with the position of the crack observed in actual measurements. The fatigue life of the indium layer, as predicted by the Coffin-Manson model, is found to be basically consistent with the measured results. A signal-to-noise ratio (SNR) analysis indicates that the indium thickness has the greatest impact on the thermal fatigue life, while the adhesive thickness has the least impact on the thermal fatigue life. Compared with the original model, the fatigue life of the optimized packaging structure is increased by 135%.