Tunnel-effect Based Parallel trimming CMOS retina array

A trimming method for the technological dispersion especially in VLSI array-like analog circuits based on tunnel-effect analogue memory is presented. This trimming can be effected simultenously for a large number of identical elements. By only one common control of trimming to all the elements, the trimming of the dispersion for all the elements in an array circuit is accomplished locally, automatically and independently. So the trimming time is independent on the number of elements. A prototype of application of this trimming to an image converter pixels is designed and fabricated in 2.4 ?m CMOS technology. Experimental results show that this trimming method is very efficient and especially can be exploited for CMOS technologie.