Low Temperature SiGe Steam Oxide - Aqueous Hf and NH3/NF3 Remote Plasma Etching and its Implementation as Si GAA Inner Spacer

For horizontally stacked nanowires or-sheets to compete with finFET, the development of a robust inner spacer module is essential. These inner spacers are required to reduce the parasitic capacitance due to the overlap between the source/drain and gate regions. Here we propose an inner spacer integration scheme for Si gate-all-around (GAA) taking advantage of the selective oxidation and oxide removal of SiGe versus Si. Compared to thermal oxide, we found a very high SiGe-oxide etch rate in aqueous HF solutions. When using an NH3/NF3remote plasma, a reduction in etch rate was found for SiGe-oxide versus thermal oxide. We show Si0.75Ge0.25-oxide meets inner spacer requirements for leakage current and electrical breakdown field and finally demonstrate the proposed inner spacer integration scheme using a fin-shaped SiGe/Si multilayer topological-test-structure.