电介质
堆栈(抽象数据类型)
功勋
降级(电信)
材料科学
高-κ电介质
可靠性(半导体)
栅极电介质
介电强度
双层
光电子学
图层(电子)
电子工程
纳米技术
计算机科学
电气工程
化学
物理
工程类
晶体管
电压
膜
生物化学
程序设计语言
功率(物理)
量子力学
作者
Andrea Padovani,Paolo La Torraca
标识
DOI:10.1016/j.mee.2023.112080
摘要
Understanding the degradation dynamics and the breakdown sequence of a bilayer high-k (HK) gate dielectric stack is crucial for the improvement of device reliability. We present a new Figure of Merit (FoM), the IL/HK Degradation Index, that depends on fundamental materials properties (the dielectric breakdown strength and the dielectric constant) and can be used to easily and quickly identify the first layer to degrade and fail in a bilayer SiO2/HK dielectric stack. Its dependence on IL and HK material parameters is investigated and its validity is demonstrated by means of accurate physics-based simulations of the degradation process. The proposed FoM can be easily used to understand the degradation dynamics of the gate dielectric stack, providing critical insights for device reliability improvement.
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