Power and Delay Estimation of universal and Exclusive gates using Static and Dynamic CMOS Design
作者
A Surya
出处
期刊:International journal of engineering and advanced technology [Blue Eyes Intelligence Engineering and Sciences Engineering and Sciences Publication - BEIESP] 日期:2019-08-29卷期号:8 (6): 2438-2441被引量:2
标识
DOI:10.35940/ijeat.f8538.088619
摘要
In this paper, designing the universal gate and exclusive gates using static, pseudo nmos and dynamic cmos design and calculate the power and delay by using microwind simulator. We can implement any Boolean functions as well as basic gate using universal gates NAND and NOR .exclusive gate XOR and XNOR are used for error detection and correction in digital communication circuits.