Chip scale packaging using chip-on-flex technology
作者
R.A. Fillion,B. Burdick,David Shaddock,P. A. Piacente
标识
DOI:10.1109/ectc.1997.606238
摘要
An increasing number of electronic designers, fabricators and users see Chip Scale Packaging (CSP) as a way to obtain the benefits foreseen in multichip packaging and Chip-on-Board (COB) without the problems and limitations currently associated with each. The Chip-on-Flex (COF) multichip packaging technology has been demonstrated to be applicable to single chip packages that meet chip scale packaging goals. This paper looks at the Chip-on-Flex Chip Scale technology and addresses issues including the process, structure, assembly, yields and reliability.