神经形态工程学
可扩展性
晶体管
计算机科学
仿真
材料科学
核(代数)
卷积(计算机科学)
巨量平行
记忆电阻器
人工神经网络
计算机体系结构
并行计算
电子工程
人工智能
电气工程
工程类
经济
电压
组合数学
数据库
经济增长
数学
作者
Jingfang Pei,Lekai Song,Pengyu Liu,Songwei Liu,Zihan Liang,Yingyi Wen,Yang Liu,Shengbo Wang,Xiaolong Chen,Teng Ma,Shuo Gao,Guohua Hu
标识
DOI:10.1002/adma.202312783
摘要
Abstract Neural networks as a core information processing technology in machine learning and artificial intelligence demand substantial computational resources to deal with the extensive multiply‐accumulate operations. Neuromorphic computing is an emergent solution to address this problem, allowing the computation performed in memory arrays in parallel with high efficiencies conforming to the neural networks. Here, scalable synaptic transistor memories are developed from solution‐sorted carbon nanotubes. The transistors exhibit a large switching ratio of over 10 5 , a significant memory window of ≈12 V arising from charge trapping, and low response delays down to tens of nanoseconds. These device characteristics endow highly stabilized reconfigurable conductance states, successful emulation of synaptic functions, and a high data processing speed. Importantly, the devices exhibit uniform characteristic metrics, e.g., with a 1.8% variation in the memory window, suggesting an industrial‐scale manufacturing capability of the fabrication. Using the memories, a hardware convolution kernel is designed and parallel image processing is demonstrated at a speed of 1 M bit per second per input channel. Given the efficacy of the convolution kernel, a promising prospect of the memories in implementing neuromorphic computing is envisaged. To explore the potential, large‐scale convolution kernels are simulated and high‐speed video processing is realized for autonomous driving.
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