Towards Integrity Monitoring for GNSS-Based Time Synchronization in Technical Applications

This paper addresses the growing need for integrity monitoring in critical timing applications, driven by increasing reliance on accurate and reliable timing in sectors such as finance and telecommunications. As synchronization becomes more crucial in these fields, ensuring the integrity of timing systems is essential to avoid potential risks and disruptions. In response, we develop a comprehensive integrity monitoring framework that introduces key concepts like Timing Errors (TE), Timing Alert Limit (TAL), and Timing Protection Levels (TPL). Sector-specific TALs are established to meet the stringent synchronization requirements of industries like finance and mobile telecommunications. To verify the proposed framework, we first examine scenarios with accessible ground truth, using open-sky datasets. For cases where ground truth is absent, two theoretical models—one based on quadratic polynomials and another utilizing Chebyshev polynomials—are employed to predict timing errors and establish protection levels. These models are validated through real-world scenarios, where continuous integrity monitoring is successfully demonstrated. Our results show that equipping receivers with Chip-Scale Atomic Clocks (CSACs) significantly improves the accuracy and reliability of integrity monitoring. The residual-variance-based approach effectively handles lower-stability clocks, such as those found in receivers with internal Temperature-Compensated Crystal Oscillators (TCXOs). In contrast, the noise-levelbased approach fails in such scenarios due to its reliance on nominal clock behavior. Notably, selecting optimal time intervals for interpolation and extrapolation is crucial, especially for handling unstable oscillators. The findings suggest that CSACs are highly recommended for applications requiring robust integrity monitoring in timing, with the residual-variance-based method offering reliable performance even in less stable conditions. Future work will explore the impact of signal interference on integrity monitoring and refine the optimization of time intervals for clock error prediction.