Highly Area Efficient Component Sharing Extended Counting ADC for Multi-Channel Sensing

This brief describes a highly area efficient 10-bit, 40kS/s extended counting ADC for multi-channel cell impedance sensing applications. The proposed ADC shares major circuit components including the amplifier, comparator, and feedback capacitors between the 6-bit incremental sigma-delta ADC and the 4-bit time-mode ADC that both operates with the same clock frequency. Furthermore, the MSB of the time-mode ADC is generated by processing the integrator output voltage after the counting operation of the incremental sigma-delta ADC without using additional circuit components, which simplifies the time-mode ADC operation. As a result, this leads to significant area and power reduction compared to other ADCs with similar resolution and bandwidth. The prototype ADC is implemented using CMOS $0.18~\mu \text{m}$ technology, where the measurement results show max. DNL and INL of 0.40 LSB and 0.88 LSB, 58.9 dB SNDR, and $1.15~\mu \text{W}$ power consumption, with core area of 75 $\mu \text{m}\,\,\mathbf {\times }$ 45 $\mu \text{m}$ (0.00375 mm2).