Analytical characterization of electrolyte and additives for high quality copper plating of through silicon vias (TSVs)

The heart of three-dimensional (3D) Si integration is the copper filled Through Silicon Via (TSV), which allows the shortest chip-to-chip interconnections. The copper filling of the TSV is usually achieved with an electro-plating method. Even though copper electro-plating for interconnects is a well-known technology due to the wide application of the copper damascene process, it proves to be quite different from the copper filling of the TSV, where the via diameter changes from nanometers to tens of microns and via depth changes from sub microns to hundreds of microns. What we have learned from the copper damascene process and what works there could not be applied directly to TSV copper filling. Although some void-free TSVs have been achieved, there are still many technical issu...[ Read more ]