降压式变换器
比较器
CMOS芯片
电子工程
电感器
计算机科学
电压
拓扑(电路)
电气工程
算法
控制理论(社会学)
工程类
控制(管理)
人工智能
作者
Jiann‐Jong Chen,Yuh‐Shyan Hwang,Jian-Han Chen,Yi-Tsen Ku,Cheng‐Chieh Yu
标识
DOI:10.1109/tvlsi.2018.2796088
摘要
A new fast-response current-mode buck converter with improved I 2 -controlled techniques is presented in this paper. First, the proposed converter uses the improved I 2 -controlled techniques to design a new current-mode buck converter. The current-sensing circuit can fully sense the inductor current. The sensing current is divided into two paths; one is flown through the dynamic-acceleration circuit, and the other is transferred to hysteretic comparator to compare with dynamic-acceleration output. The I 2 -controlled techniques increase the bandwidth of the converter's closed-loop gain that will speed up the converter's transient response. Second, the converter uses the phase- frequency-controlled techniques to lock the switching frequency of the adaptive on-time generator of the proposed converter and reduce the difficulty of the output filter. Third, the circuit does not need slope compensation, so that it is very simple to implement. Fourth, the proposed buck converter was implemented with TSMC 0.35-μm CMOS 2P4M processes, which is a low-cost process. The experimental results show that the maximum load current can be up to 600 mA, the input voltage range is 2.6-4 V, the output voltage is regulated at 1.8 V, the maximum power efficiency is up to 90%, and the transient response times are 2.5 and 2.8 μs at rising and falling edges, respectively.
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