开关电容器
寄生元件
电感
电容器
电子工程
电压
电感器
电气工程
去耦电容器
工程类
材料科学
计算机科学
作者
Huaqiao Liu,Yenan Chen
标识
DOI:10.1109/peas58692.2023.10394698
摘要
The loss of parasitic inductance and resistance of PCB can be significant for high-frequency high-current VRM applications. This paper explores the analysis and optimization of PCB layout for a quasi-two-stage 12-V-to-1-V hybrid-switched-capacitor converter with a switched-capacitor front-end stage and a buck-type regulator stage linked by two switched intermediate voltage rails. Single-sided PCB design and double-sided PCB design of the hybrid-switched-capacitor converter are presented and the ESR and ESL of main current loops are extracted by FEM simulation. The single-sided design yields lower ESL due to smaller loop area and the double-sided design achieves lower ESR with shorter loop length. Multiple 12-V-to-1-V 160-A prototypes with single-sided design and double-sided design are built and tested.
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