Digital lithography technology for advanced packaging manufacturing

平版印刷术 电子包装 包装工程 制造工程 集成电路封装 计算机科学 材料科学 工程类 光电子学 机械工程 电气工程 电信 炸薯条
作者
Anindarupa Chunder,Cindy Mora,Heather Bailey,Bruce Lee,Clay Yeh,Chiashain Chuang,Qin Zhong,Niranjan Khasgiwale,Jang Fung Chen
标识
DOI:10.1117/12.3049294
摘要

Today’s high-performance computing (HPC) applications such as AI, next-gen mobile communications, and smart electric vehicles (EVs) necessitate extensive data handling capability. This places unprecedented demand on advanced packaging (AP) industry to have unique manufacturing solution of creating higher bandwidth input-output (I/O) connections for highspeed communication between chips. One of the critical challenges in achieving high-density I/O connections is the need for precise patterning of fine-pitch copper redistribution layers (RDL) on AP substrates that are often warped or have complex topographies, while maintaining low cost-of-ownership (CoO) and high throughput. Applied Materials Digital Lithography TechnologyTM (DLTTM) is an innovative exposure tool that addresses these unique photolithography challenges. Unlike traditional steppers, DLT is a maskless tool equipped with digital micro-mirror device (DMD) in its optical imaging assembly with a 400nm diode laser illumination that can achieve submicron resolution while using existing industry standard photoresists The tool’s modular design with the warpage control unit (WASP) allows it to handle a wide range of packaging substrates for more efficient chucking. The technological distinction of our approach lies in our current ability to achieve fine lines-space (L/S) feature of 2um and 1um with high aspect ratios, maintaining critical dimension uniformity (CDU) across entire panels. DLT ensures precise overlay control even under challenging conditions, such as warped substrates with high local topography, all while sustaining high throughput. This capability positions us at the forefront of reshaping the industry's lithography roadmap. As the semiconductor industry strives for the scaling of PPACt* (Power, Performance, Area Cost, and time to market), today’s AP industry realizes high-density scaling of L/S RDLs and Vias together with steep sidewall on expansive package sizes. In this paper, we summarize DLT tool performance and show some of the unique capabilities not found for traditional steppers nor scanners, which are well-suited for AP manufacturing.
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