A 9.4-ENOB 1V 3.8¿W 100kS/s SAR ADC with Time-Domain Comparator
作者
Andrea Agnes,Edoardo Bonizzoni,P. Malcovati,Franco Maloberti
出处
期刊:Digest of technical papers日期:2008-02-01卷期号:: 246-610被引量:184
标识
DOI:10.1109/isscc.2008.4523149
摘要
The ADC-SAR is fabricated in a 0.18mum 2P5M CMOS process. This SAR-ADC converter achieves 56fJ/conversion-step FOM with 58dB SNDR. It uses a comparator, named time-domain comparator, that instead of operating in the voltage domain, transforms the input and the reference voltages into pulses and compares their duration.