A Cell-Based Wide-Frequency-Range DLL Supporting Fast Frequency Scaling

In this paper, we present a cell-based wide-frequency-range DLL supporting clock frequencies from 10MHz to 1GHz in 90nm. To support fast locking (during frequency scaling), we present novel architecture with a socalled “fast-locking mode” - in which the control code for the Long-Range Delay Block (LRDB) can be quickly determined in a way that the overall delay across the underlying DLL can be roughly one or multiple clock cycle times of the input clock signal. One can use this LRDB as a common building block and integrate it with any arbitrary narrow-range DLL for DVFS (Dynamic Voltage and Frequency Scaling) applications while achieving fast frequency scaling. The functionality is validated by post-layout simulation using a 90nm CMOS process. With the proposed scheme, the long-range locking time can be reduced significantly from 24% to 98%, respectively, for different input clock frequencies.