三元运算
同质结
与非门
场效应晶体管
晶体管
实现(概率)
逻辑门
光电子学
拓扑(电路)
电气工程
电子工程
算法
数学
物理
计算机科学
工程类
电压
程序设计语言
统计
异质结
作者
Maksim Andreev,Juncheol Kang,Taeran Lee,Jin‐Hong Park
标识
DOI:10.1109/edtm55494.2023.10103021
摘要
We report WSe 2 homojunction-based field-effect transistors (FETs) with W-shaped transfer IV characteristics, enabled by area-selective tailoring of the WSe 2 channel work function with the electron-beam treatment. We demonstrate that FETs with such IV curves are suitable for the implementation of the two-input ternary NAND logic gate, one of the essential building blocks required for the realization of a functionally complete set of logic gates in ternary logic.
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