材料科学
平版印刷术
模板
抵抗
光电子学
半导体
晶体管
下一代光刻
模版印刷
范德瓦尔斯力
薄脆饼
纳米技术
电子束光刻
图层(电子)
计算机科学
物理
计算科学
量子力学
电压
分子
作者
Wenbin Song,Lingan Kong,Quanyang Tao,Qing Liu,Xiangdong Yang,Jia Li,Huigao Duan,Xidong Duan,Lei Liao,Yuan Liu
出处
期刊:Small
[Wiley]
日期:2021-06-17
卷期号:17 (29)
被引量:13
标识
DOI:10.1002/smll.202101209
摘要
Abstract 2D semiconductors have attracted tremendous attention as an atomically thin channel for transistors with superior immunity to short‐channel effects. However, with atomic thin structure, the delicate 2D lattice is not fully compatible with conventional lithography processes that typically involve high‐energy photon/electron radiation and unavoidable polymer residues, posing a key limitation for high performance 2D transistors. Here, a novel van der Waals (vdW) stencil lithography technique based on dry mask lamination process is developed. By pre‐fabricating polymethyl methacrylate (PMMA) resist with designed patterns, the whole PMMA mask layers could be mechanically released from the sacrifice wafer and physically laminated on top of various 2D semiconductors. The vdW stencil lithography ensures pristine 2D surface without any high‐energy electron/photon radiation, polymer residues, or chemical doping effects in conventional lithography process; and the soft nature of PMMA enables intimate contact between the mask and the 2D materials without physical gap, leading to ultra‐high resolution down to 60 nm. Together, by applying vdW stencil lithography for 2D semiconductors, high performance transistors are demonstrated. Our method not only demonstrates improved 2D transistor performance without lithography induced damages, but also provides a new vdW stencil lithography technique for 2D materials with high resolution.
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