存水弯(水管)
薄膜晶体管
材料科学
光电子学
晶体管
频道(广播)
氧化物
堆栈(抽象数据类型)
原子层沉积
非易失性存储器
图层(电子)
沉积(地质)
电荷(物理)
表征(材料科学)
薄膜
纳米技术
电气工程
物理
计算机科学
电压
沉积物
工程类
古生物学
气象学
生物
冶金
量子力学
程序设计语言
作者
Soo Hyun Bae,Hyun Joo Ryoo,Nak Jin Seong,Kyu Jeong Choi,Gi Heon Kim,Sung Min Yoon
出处
期刊:Journal of vacuum science and technology
[American Vacuum Society]
日期:2021-06-22
卷期号:39 (4)
被引量:5
摘要
We fabricated vertical-channel charge-trap memory thin film transistors (V-CTM TFTs) using an In–Ga–Zn–O channel and ZnO charge trap layers, in which a solution-processed SiO2 spacer pattern was introduced to scale down the vertical-channel length below 190 nm. The vertical gate-stack structure was implemented by atomic-layer deposition with excellent film conformality. The V-CTM TFTs with channel lengths of 190 (S1) and 140 nm (S2) showed charge-trap-assisted wide memory windows of 12.0 and 10.1 V, respectively. The memory margins between the on- and off-programmed currents were estimated to be 1.2 × 105 and 5.1 × 102 with a program pulse duration of 100 ms for S1 and S2, respectively. The programmed states did not exhibit any degradation with a lapse of retention for 104 s. With reducing the channel length, the number of endurance cycles decreased from 5000 to 3000 cycles. A vertical integration of oxide-based CTM device scaled down to sub-150 nm could be verified to show sound nonvolatile memory operations, even though there remain some technical issues such as a higher level of off-current for S2.
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