浸没式光刻
极紫外光刻
平版印刷术
光学
材料科学
抵抗
电子束光刻
下一代光刻
光电子学
光刻
放大器
无光罩微影
计量学
物理
纳米技术
CMOS芯片
图层(电子)
作者
Tadashi Komagata,Takahisa Hasegawa,Kazuya Goto,Kenji Kono,Ryuuji Yamamoto,Naoki Nishida,Yasutoshi Nakagawa
摘要
Lithography technologies promising for the half pitch (HP) 32 nm generation include 193 nm immersion with water, extreme ultraviolet lithography (EUVL), and nano-imprint lithography (NIL). Among these, 193 nm immersion with water is considered a mainstream for hp 32 nm device fabrication in terms of performance and device production costs. Meanwhile, according to the International Technology Roadmap for Semiconductors (ITRS) 2009, the optical masks for hp 32 nm devices need to meet extremely strict requirements; for example, an image placement accuracy of 3.8 nm (2.7 nm for double patterning), and CD uniformities of 1.5 nm (isolated lines) and 2.4 nm (dense lines). To meet these accuracy requirements, we have developed JBX-3200MV, a variable shaped beam mask writer featuring an accelerating voltage of 50 kV and a current density of 70 A/cm2. For this new writer, we developed a new digital-to-analog converter (DAC) amplifier designed to reduce noises input to electron beam optics components such as the main and sub positioning deflectors and the beam shaping deflectors. The stage and exposure chambers were enhanced in rigidity to reduce mechanical noises. The position of the stage is measured by laser devices with a finer resolution of 0.15 nm, and the measured results are fed back to the beam position. In addition, data transfer speed and proximity correction speed were improved to handle larger data volumes. Our exposure test results demonstrate that the new lithography system, installed at the leading-edge mask production facility, achieved the hp 32 nm mask accuracies required by the ITRS 2009.
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