Resistive switching in a p-n junction TiN/ZnO/NiO/Pt structure

The performance optimization of resistive switching (RS) memory requires balancing a low operating voltage with a high switching ratio, which are difficult to achieve simultaneously with a single oxide material. This study investigates an RS device with a p-n junction structure, where ZnO (n-type) and NiO (p-type) are combined to form a TiN/ZnO/NiO/Pt stack. Through band engineering, this structure achieved both a low operating voltage and a large switching ratio ([Formula: see text]400). The TiN/ZnO/Pt structure exhibits a low operating voltage owing to the low oxygen vacancy ([Formula: see text] formation energy of ZnO but suffers from a limited switching ratio. Conversely, the TiN/NiO/Pt structure demonstrates a high operating voltage owing to the high [Formula: see text] formation energy of NiO. The introduction of the p-n junction interface barrier in the TiN/ZnO/NiO/Pt structure significantly increases the high-resistance state resistance, thereby achieving a large switching ratio. At the same time, the low operating voltage characteristic of ZnO substantially reduced the overall operating voltage of the device. A systematic investigation of the RS characteristics confirms that this structure combines high performance, low power consumption, and excellent stability. These findings provide an important reference for the design of next-generation RS memory devices.